Start with the complete sampled drive loop, including the effective delay, two-level inverter and PMSM feedback path. Then compare two controllers: one models the delay and one does not. Hover any controller block to see its role and live numeric value. Values follow the machine you last used in the design studio.
Start here before comparing the controllers. Both designs drive the same sampled-data plant: current references enter a digital controller, the command passes through the real actuation delay and inverter, the PMSM currents evolve, and sampled currents return at the next control update.
The z−1 block stores the voltage command so the plant receives u[k−1] during the next update. Td is the physical time from current/angle sampling until that voltage becomes effective. In the exact dq plant it appears in the voltage-vector angle, φ = φfw − ωeTd. It is therefore not a second hidden sample delay: it describes the orientation and timing of the applied voltage inside the sample interval.
PI feedback + ωL̂ decoupling. The gains are designed from a continuous-time model and the delay is ignored during tuning. The physical delay is still present when the controller is tested against the plant.
Reference feedforward + current feedback + integral action + delayed-voltage feedback. The previous command u[k−1] is a controller state, so the design places poles with the actuation delay already included.
Hover or tap a block to see its role and live value at the inspected speed.
Hover or tap a block to see its role and live value at the inspected speed.
Same true plant on the right of both diagrams — the only difference is what the designer chose to model. The delay-aware structure has one extra feedback path (K2, on the delayed voltage): that single block is what keeps the poles inside the unit circle at speed. Convince yourself in the design studio.
The sampling frequency fs is the rate at which phase currents and rotor angle are sampled and the current controller is executed. Its period Ts = 1/fs defines the discrete-time model. The switching frequency fsw is the carrier rate of the three-phase two-level inverter, with Tsw = 1/fsw. They are often equal, but they do not have to be. This release uses an average-value inverter model, so fsw is shown and stored for system definition but switching ripple is not injected into the current waveform or the pole calculation.
Rs is the stator phase resistance represented in the dq equations. Ld and Lq are the d- and q-axis inductances. The machine model is the standard dq current model with cross-coupling: di/dt = Aci + Bcu with Ac = [−Rs/Ld, ωLq/Ld; −ωLd/Lq, −Rs/Lq] and Bc = diag(1/Ld, 1/Lq). The back-EMF enters as a disturbance and does not affect the linear stability analysis.
The state transition A = eAcTs is evaluated in closed form (Cayley–Hamilton for the 2×2 case). The input matrix uses the Van Loan hold integral — the top-right block of the 4×4 exponential of [[Ac, Bc], [0, −ωJ]]Ts — which is the exact model of a voltage held constant in the stator frame over one sample, expressed in the rotor frame. The modulator angle-advance convention is explicit: B = Ξ·eJφ with φ = φfw − ωTd, where Td is the effective time from sampling to voltage action. Separately, both closed-loop structures include the explicit one-update voltage state u[k−1], drawn as z−1. The firmware advance is computed from the estimated delay, so a delay mismatch produces the physically correct residual angle error. Convention errors of this kind look benign at low speed and destabilize the loop at high speed — which is why they are modeled rather than assumed away.
The one-sample computational delay is augmented as a state, x = [i; u[k−1]], and a 2DOF state-feedback law with integral action (u[k] = Ktr + ξ − K1i − K2u[k−1], ξ[k+1] = ξ + Ki(r − i)) places the closed-loop poles toward a first-order target H(z) = (1−β)/(z(z−β)) per axis, β = e−αccTs, with αcc capped by the phase-margin ceiling (π/2 − PMreq)/Tρ. The gains are closed-form; the approach is direct discrete-time pole placement in the style of Hinkkanen et al., IEEE Trans. Industry Applications, 2016.
The comparison controller is the industry-default continuous-time IMC PI (kp = αL̂, ki = αR̂s, α = ln9/tr) with ωL̂ decoupling, forward-Euler discretized, delay ignored at design time. Both controllers are closed against the same exact discrete plant, including the parameter and delay mismatch you specify. Stability is the spectral radius of the resulting 6-state closed loop, swept over speed; the first |z| = 1 crossing is refined by bisection.
Every engine release is checked by an independent Python/scipy implementation that recomputes the discretization, the gains, the closed-loop eigenvalues, DC tracking and the stability sweeps. Discretization and gains agree to roughly 1e-9 or better (typically machine precision); eigenvalues to 1e-7. The check is part of the repository (verify/) and runs in one command. Nothing on these pages is fitted, sketched or illustrative — every plot is the actual computation for the parameters you entered, executed in your browser.
Use the theory and live calculations as the starting point for an informal, non-confidential beta discussion.